Lazuli
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timer_counter_1.c
Go to the documentation of this file.
1/*
2 * SPDX-License-Identifier: GPL-3.0-only
3 * This file is part of Lazuli.
4 */
5
15#include <stdint.h>
16
17#include <Lazuli/config.h>
18
20
22#define TIMER_COUNTER_1_PRESCALER (8)
23
27#define COMPARE_MATCH_REGISTER_VALUE \
28 ((uint16_t)((LZ_CONFIG_MACHINE_CLOCK_FREQUENCY / \
29 (TIMER_COUNTER_1_PRESCALER * \
30 LZ_CONFIG_SYSTEM_CLOCK_RESOLUTION_FREQUENCY)) - 1)) \
31
32void
34{
35 const uint16_t compareMatchRegisterValue = COMPARE_MATCH_REGISTER_VALUE;
36
37 TCCR1A = 0;
38 TIMSK1 = 0;
39 TIFR1 = 0;
40 TCNT1H = 0;
41 TCNT1L = 0;
42 TCCR1B = TCCR1B_WGM12; /* CTC mode, TOP is OCR1A */
43 OCR1AH = HI8(compareMatchRegisterValue);
44 OCR1AL = LO8(compareMatchRegisterValue);
45}
46
47void
49{
50 /* Enable output compare A match interrupt */
52
53 /* Clock select : system clock, prescale by 8 */
55}
unsigned int uint16_t
Represents a unsigned integer type with width of exactly 16 bits.
Definition stdint.h:94
#define HI8(X)
Take the high byte of a 16-bit value.
Definition common.h:208
#define LO8(X)
Take the low byte of a 16-bit value.
Definition common.h:201
Include appropriate config file.
void Arch_InitSystemTimer(void)
Initialize the system timer.
void Arch_StartSystemTimer(void)
Start the system timer.
#define COMPARE_MATCH_REGISTER_VALUE
Value of the compare match register with the desired clock settings.
Interface for Timer/Counter 1 of the ATMega328p.
#define TCCR1B
Timer/Counter1 Control Register B.
#define TCNT1H
Timer/Counter1 (High register)
#define TCNT1L
Timer/Counter1 (Low register)
@ TCCR1B_CS11
Clock select
@ TCCR1B_WGM12
Waveform generation mode
#define OCR1AL
Output Compare Register 1 A (Low register)
#define TCCR1A
Timer/Counter1 Control Register A.
#define OCR1AH
Output Compare Register 1 A (High register)
#define TIFR1
Timer/Counter 1 Interrupt Flag Register.
@ TIMSK1_OCIE1A
Output compare A match interrupt enable.
#define TIMSK1
Timer/Counter 1 Interrupt Mask Register.